思澈科技软件开发工具包  2.20
Reset and control

Modules

 RCC Exported Types
 RCC System, lock configuration definition.
 

Macros

#define HAL_RCC_HCPU_reset(modules, reset)
 Reset RCC module for HCPU. More...
 
#define HAL_RCC_HCPU_reset2(modules, reset)
 
#define HAL_RCC_HCPU_enable(modules, enabled)
 enable/disable RCC module for HCPU. More...
 
#define HAL_RCC_HCPU_enable2(modules, enabled)
 
#define HAL_RCC_HCPU_RELEASE_ALL()
 Release all HPSYS modules. More...
 
#define HAL_RCC_LCPU_reset(modules, reset)
 Reset RCC module for LCPU. More...
 
#define HAL_RCC_LCPU_RELEASE_ALL()   (hwp_lpsys_rcc->RSTR1 = 0)
 Release all LPSYS modules. More...
 
#define HAL_RCC_LCPU_enable(modules, enabled)
 enable/disable RCC module for LCPU. More...
 
#define HAL_RCC_LCPU_enable2(modules, enabled)
 
#define HAL_RCC_LCPU_ClockSelectDBL96()   MODIFY_REG(hwp_lpsys_rcc->CSR, LPSYS_RCC_CSR_SEL_SYS_Msk, MAKE_REG_VAL(RCC_SYSCLK_DBL96, LPSYS_RCC_CSR_SEL_SYS_Msk, LPSYS_RCC_CSR_SEL_SYS_Pos));
 LPSYS clock source switch to DBL96. More...
 
#define HAL_RCC_BCPU_reset(modules)   hwp_ble_rcc->RSTR|=(modules)
 Reset RCC module for BCPU. More...
 
#define HAL_RCC_BCPU_enable(modules, enabled)
 enable/disable RCC module for BCPU. More...
 
#define HAL_RCC_BCPU_ClockSelect(clk_module, src)   hwp_ble_rcc->CSR=src
 Select clock source for BCPU HW module. More...
 

Functions

void HAL_RCC_HCPU_ClockSelect (int clk_module, int src)
 Select clock source for HCPU HW module. More...
 
int HAL_RCC_HCPU_GetClockSrc (int clk_module)
 Get clock source of HCPU HW module. More...
 
void HAL_RCC_HCPU_SetDiv (int div, int pdiv1, int pdiv2)
 Set divider for clock of HCPU. More...
 
void HAL_RCC_HCPU_GetDiv (int *div, int *pdiv1, int *pdiv2)
 Get divider for clock of HCPU. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_EnableDLL1 (uint32_t freq)
 Enable DLL1. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_DisableDLL1 (void)
 Disable DLL1. More...
 
uint32_t HAL_RCC_HCPU_GetDLL1Freq (void)
 Get DLL1 freqency. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_EnableDLL2 (uint32_t freq)
 Enable DLL2. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_DisableDLL2 (void)
 Disable DLL2. More...
 
uint32_t HAL_RCC_HCPU_GetDLL2Freq (void)
 Get DLL2 freqency. More...
 
uint32_t HAL_RCC_HCPU_GetDLL3Freq (void)
 
HAL_StatusTypeDef HAL_RCC_HCPU_EnableDLL3 (uint32_t freq)
 Enable DLL3. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_DisableDLL3 (void)
 Disable DLL3. More...
 
__STATIC_INLINE void HAL_RCC_LCPU_ClockSelect (int clk_module, int src)
 Select clock source for LCPU HW module. More...
 
int HAL_RCC_LCPU_GetClockSrc (int clk_module)
 Get clock source of LCPU HW module. More...
 
void HAL_RCC_LCPU_SetDiv (int div, int pdiv1, int pdiv2)
 Set divider for clock of LCPU. More...
 
void HAL_RCC_LCPU_GetDiv (int *div, int *pdiv1, int *pdiv2)
 Get divider for clock of LCPU. More...
 
void HAL_RCC_BCPU_SetDiv (int div, int pdiv, int macdiv, int macfreq)
 Set divider for clock of BCPU. More...
 
uint32_t HAL_RCC_GetHCLKFreq (int core_id)
 Get HCLK freq. More...
 
uint32_t HAL_RCC_GetSysCLKFreq (int core_id)
 Get SYSCLK freq. More...
 
uint32_t HAL_RCC_GetPCLKFreq (int core_id, int is_pclk1)
 Get PCLK freq. More...
 
void HAL_RCC_ReleaseLCPU (void)
 Release LCPU. More...
 
void HAL_RCC_ResetLCPU (void)
 Reset LCPU. More...
 
void HAL_RCC_Reset_and_Halt_LCPU (uint8_t is_init)
 Reset and halt LCPU. More...
 
void HAL_RCC_ResetBluetoothRF (void)
 Reset BLE RF. More...
 
void HAL_RCC_SetMacFreq (void)
 Set Mac freq. More...
 
void HAL_RCC_ResetModule (RCC_MODULE_TYPE module)
 Reset module. More...
 
void HAL_RCC_EnableModule (RCC_MODULE_TYPE module)
 Enable module if it's disabled. More...
 
void HAL_RCC_DisableModule (RCC_MODULE_TYPE module)
 Disable module. More...
 
HAL_StatusTypeDef HAL_RCC_CalibrateRC48 (void)
 Calibrate RC48. More...
 
HAL_StatusTypeDef HAL_RCC_SetModuleFreq (RCC_MODULE_TYPE module, uint32_t freq)
 
uint32_t HAL_RCC_GetModuleFreq (RCC_MODULE_TYPE module)
 
void HAL_RCC_Init (void)
 RCC Init. More...
 
void HAL_RCC_MspInit (void)
 Chip specific RCC initialization function. More...
 
void HAL_RCC_HCPU_SetDeepWFIDiv (int8_t div, int8_t pdiv1, int8_t pdiv2)
 Set divider for clock of HCPU in deep WFI mode. More...
 
void HAL_RCC_HCPU_GetDeepWFIDiv (int *div, int *pdiv1, int *pdiv2)
 Get deepWFI divider for HCPU clock. More...
 
void HAL_RCC_HCPU_DeepWFIClockSelect (bool sys_clk, uint32_t sys_clk_src)
 Select clock source for HCPU in deep WFI mode. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_ConfigHCLK (uint32_t freq_in_mhz)
 Config HPSYS HCLK. More...
 
HAL_StatusTypeDef HAL_RCC_HCPU_ConfigHCLKByMode (uint32_t freq_in_mhz, HPSYS_DvfsModeTypeDef mode)
 Config HPSYS HCLK by DVFS mode. More...
 
HPSYS_DvfsModeTypeDef HAL_RCC_HCPU_GetCurrentDvfsMode (void)
 Get HPSYS current DVFS mode. More...
 

Detailed Description

Macro Definition Documentation

◆ HAL_RCC_BCPU_ClockSelect

#define HAL_RCC_BCPU_ClockSelect (   clk_module,
  src 
)    hwp_ble_rcc->CSR=src

Select clock source for BCPU HW module.

Parameters
clk_modulemodule for clock
srcclock 0:RCC_SYSCLK_HRC48, 1:RCC_SYSCLK_HXT48
Return values
None

◆ HAL_RCC_BCPU_enable

#define HAL_RCC_BCPU_enable (   modules,
  enabled 
)
Value:
{\
if (enabled) \
hwp_ble_rcc->ENR|=(modules);\
else \
hwp_ble_rcc->ENR&=~(modules); \
}

enable/disable RCC module for BCPU.

Parameters
modulesmodules to be enabled/disabled. defined in ble_rcc.h, BLE_RCC_ENR_XXX
enabled1: enable(bit set), 0:disable(bit clear).
Return values
None

◆ HAL_RCC_BCPU_reset

#define HAL_RCC_BCPU_reset (   modules)    hwp_ble_rcc->RSTR|=(modules)

Reset RCC module for BCPU.

Parameters
modulesmodules to be reset, defined in ble_rcc.h, BLE_RCC_RSTR_XXX
Return values
None

◆ HAL_RCC_HCPU_enable

#define HAL_RCC_HCPU_enable (   modules,
  enabled 
)
Value:
{\
if (enabled) \
hwp_hpsys_rcc->ENR1|=(modules);\
else \
hwp_hpsys_rcc->ENR1&=~(modules);\
}

enable/disable RCC module for HCPU.

Parameters
modulesmodules to be enabled/disabled. defined in hpsys_rcc.h, HPSYS_RCC_ENR_XXX
enabled1: enable(bit set), 0:disable(bit clear).
Return values
None

◆ HAL_RCC_HCPU_enable2

#define HAL_RCC_HCPU_enable2 (   modules,
  enabled 
)
Value:
{\
if (enabled) \
hwp_hpsys_rcc->ENR2|=(modules);\
else \
hwp_hpsys_rcc->ENR2&=~(modules);\
}

◆ HAL_RCC_HCPU_RELEASE_ALL

#define HAL_RCC_HCPU_RELEASE_ALL ( )
Value:
do \
{ \
hwp_hpsys_rcc->RSTR1 = 0; \
hwp_hpsys_rcc->RSTR2 = 0; \
} \
while (0)

Release all HPSYS modules.

Return values
None

◆ HAL_RCC_HCPU_reset

#define HAL_RCC_HCPU_reset (   modules,
  reset 
)
Value:
{ \
if (reset) \
hwp_hpsys_rcc->RSTR1|=(modules);\
else \
hwp_hpsys_rcc->RSTR1&=~(modules); \
}

Reset RCC module for HCPU.

Parameters
modulesmodules to be reset, defined in hpsys_rcc.h, HPSYS_RCC_RSTR_XXX
reset1: reset(bit set), 0:Release reset(bit clear).
Return values
None

◆ HAL_RCC_HCPU_reset2

#define HAL_RCC_HCPU_reset2 (   modules,
  reset 
)
Value:
{ \
if (reset) \
hwp_hpsys_rcc->RSTR2|=(modules);\
else \
hwp_hpsys_rcc->RSTR2&=~(modules); \
}

◆ HAL_RCC_LCPU_ClockSelectDBL96

#define HAL_RCC_LCPU_ClockSelectDBL96 ( )    MODIFY_REG(hwp_lpsys_rcc->CSR, LPSYS_RCC_CSR_SEL_SYS_Msk, MAKE_REG_VAL(RCC_SYSCLK_DBL96, LPSYS_RCC_CSR_SEL_SYS_Msk, LPSYS_RCC_CSR_SEL_SYS_Pos));

LPSYS clock source switch to DBL96.

Return values
None

◆ HAL_RCC_LCPU_enable

#define HAL_RCC_LCPU_enable (   modules,
  enabled 
)
Value:
{\
if (enabled) \
hwp_lpsys_rcc->ENR1|=(modules);\
else \
hwp_lpsys_rcc->ENR1&=~(modules);\
}

enable/disable RCC module for LCPU.

Parameters
modulesmodules to be enabled/disabled. defined in lpsys_rcc.h, LPSYS_RCC_ENR_XXX
enabled1: enable(bit set), 0:disable(bit clear).
Return values
None

◆ HAL_RCC_LCPU_enable2

#define HAL_RCC_LCPU_enable2 (   modules,
  enabled 
)
Value:
{\
if (enabled) \
hwp_lpsys_rcc->ENR2|=(modules);\
else \
hwp_lpsys_rcc->ENR2&=~(modules);\
}

◆ HAL_RCC_LCPU_RELEASE_ALL

#define HAL_RCC_LCPU_RELEASE_ALL ( )    (hwp_lpsys_rcc->RSTR1 = 0)

Release all LPSYS modules.

Return values
void

◆ HAL_RCC_LCPU_reset

#define HAL_RCC_LCPU_reset (   modules,
  reset 
)
Value:
{ \
if (reset) \
hwp_lpsys_rcc->RSTR1|=(modules);\
else \
hwp_lpsys_rcc->RSTR1&=~(modules); \
}

Reset RCC module for LCPU.

Parameters
modulesmodules to be reset, defined in lpsys_rcc.h, LPSYS_RCC_RSTR_XXX
reset1: reset(bit set), 0:Release reset(bit clear).
Return values
None

Function Documentation

◆ HAL_RCC_BCPU_SetDiv()

void HAL_RCC_BCPU_SetDiv ( int  div,
int  pdiv,
int  macdiv,
int  macfreq 
)

Set divider for clock of BCPU.

Parameters
divmain divider HCLK=BLECLK(48M)/div
pdivdivider for pclk, HCLK not divided; 100 - HCLK divided by 2; 101 - divided by 4; 110 - divided by 8; 111 - divided by 16
macdivdivider for MACCLK = HCLK / MACDIV
macfreqfrequency of BLE MAC master clock
Return values
None

◆ HAL_RCC_CalibrateRC48()

HAL_StatusTypeDef HAL_RCC_CalibrateRC48 ( void  )

Calibrate RC48.

Must be called after XTAL48 is ready

Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_DisableModule()

void HAL_RCC_DisableModule ( RCC_MODULE_TYPE  module)

Disable module.

If module is already disabled, it has no effect

Parameters
modulemodule name
Return values
void

◆ HAL_RCC_EnableModule()

void HAL_RCC_EnableModule ( RCC_MODULE_TYPE  module)

Enable module if it's disabled.

If module is already enabled, it has no effect

Parameters
modulemodule name
Return values
void

◆ HAL_RCC_GetHCLKFreq()

uint32_t HAL_RCC_GetHCLKFreq ( int  core_id)

Get HCLK freq.

Parameters
core_idCore ID
Return values
HCLKFrequency for Core ID

◆ HAL_RCC_GetPCLKFreq()

uint32_t HAL_RCC_GetPCLKFreq ( int  core_id,
int  is_pclk1 
)

Get PCLK freq.

Parameters
core_idCore ID
is_pclk11: Get pclk1, 0: not PCLK1
Return values
PCLKfreq for specific CORE.

◆ HAL_RCC_GetSysCLKFreq()

uint32_t HAL_RCC_GetSysCLKFreq ( int  core_id)

Get SYSCLK freq.

Parameters
core_idCore ID,
Return values
SYSCLKFrequency for Core ID

◆ HAL_RCC_HCPU_ClockSelect()

void HAL_RCC_HCPU_ClockSelect ( int  clk_module,
int  src 
)

Select clock source for HCPU HW module.

Parameters
clk_modulemodule for clock, RCC_CLK_MOD_XXX
srcclock source.
Return values
None

◆ HAL_RCC_HCPU_ConfigHCLK()

HAL_StatusTypeDef HAL_RCC_HCPU_ConfigHCLK ( uint32_t  freq_in_mhz)

Config HPSYS HCLK.

If freq is greater than 48MHz, DLL1 would be used as SYSCLK. If freq is less than or equal to 48MHz, all DLLs except DLL1 should be disabled before calling this function, DLL1 would be disabled in this function automatically.

Parameters
freq_in_mhzFrequency in MHz
Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_ConfigHCLKByMode()

HAL_StatusTypeDef HAL_RCC_HCPU_ConfigHCLKByMode ( uint32_t  freq_in_mhz,
HPSYS_DvfsModeTypeDef  mode 
)

Config HPSYS HCLK by DVFS mode.

Parameters
freq_in_mhzFrequency in MHz
modeDVFS mode
Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_DeepWFIClockSelect()

void HAL_RCC_HCPU_DeepWFIClockSelect ( bool  sys_clk,
uint32_t  sys_clk_src 
)

Select clock source for HCPU in deep WFI mode.

Parameters
sys_clkwhether use sys clock, true: use sys clock, false: use LP clock
sys_clk_srcsys clock source, such as RCC_SYSCLK_HXT48
Return values
None

◆ HAL_RCC_HCPU_DisableDLL1()

HAL_StatusTypeDef HAL_RCC_HCPU_DisableDLL1 ( void  )

Disable DLL1.

Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_DisableDLL2()

HAL_StatusTypeDef HAL_RCC_HCPU_DisableDLL2 ( void  )

Disable DLL2.

Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_DisableDLL3()

HAL_StatusTypeDef HAL_RCC_HCPU_DisableDLL3 ( void  )

Disable DLL3.

Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_EnableDLL1()

HAL_StatusTypeDef HAL_RCC_HCPU_EnableDLL1 ( uint32_t  freq)

Enable DLL1.

Parameters
freqFreqency of DLL1
Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_EnableDLL2()

HAL_StatusTypeDef HAL_RCC_HCPU_EnableDLL2 ( uint32_t  freq)

Enable DLL2.

Parameters
freqFreqency of DLL2
Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_EnableDLL3()

HAL_StatusTypeDef HAL_RCC_HCPU_EnableDLL3 ( uint32_t  freq)

Enable DLL3.

Parameters
freqFreqency of DLL3
Return values
HAL_OKif successful, Otherwise HAL_ERROR

◆ HAL_RCC_HCPU_GetClockSrc()

int HAL_RCC_HCPU_GetClockSrc ( int  clk_module)

Get clock source of HCPU HW module.

Parameters
clk_modulemodule for clock, RCC_CLK_MOD_XXX
Return values
clocksource,

◆ HAL_RCC_HCPU_GetCurrentDvfsMode()

HPSYS_DvfsModeTypeDef HAL_RCC_HCPU_GetCurrentDvfsMode ( void  )

Get HPSYS current DVFS mode.

Returns
dvfs mode

◆ HAL_RCC_HCPU_GetDeepWFIDiv()

void HAL_RCC_HCPU_GetDeepWFIDiv ( int *  div,
int *  pdiv1,
int *  pdiv2 
)

Get deepWFI divider for HCPU clock.

Parameters
divpointer to main divider, HCLK=HPCLK/div
pdiv1pointer to divider for pclk1= HCLK/ (2^PDIV1) default 1
pdiv2pointer to divider for pclk2= HCLK/ (2^PDIV2) default 5
Return values
None

◆ HAL_RCC_HCPU_GetDiv()

void HAL_RCC_HCPU_GetDiv ( int *  div,
int *  pdiv1,
int *  pdiv2 
)

Get divider for clock of HCPU.

Parameters
divpointer to main divider, HCLK=HPCLK/div
pdiv1pointer to divider for pclk1= HCLK/ (2^PDIV1) default 1
pdiv2pointer to divider for pclk2= HCLK/ (2^PDIV2) default 5
Return values
None

◆ HAL_RCC_HCPU_GetDLL1Freq()

uint32_t HAL_RCC_HCPU_GetDLL1Freq ( void  )

Get DLL1 freqency.

Return values
Frequencyof DLL1, 0 if not enabled

◆ HAL_RCC_HCPU_GetDLL2Freq()

uint32_t HAL_RCC_HCPU_GetDLL2Freq ( void  )

Get DLL2 freqency.

Return values
Frequencyof DLL2, 0 if not enabled

◆ HAL_RCC_HCPU_SetDeepWFIDiv()

void HAL_RCC_HCPU_SetDeepWFIDiv ( int8_t  div,
int8_t  pdiv1,
int8_t  pdiv2 
)

Set divider for clock of HCPU in deep WFI mode.

Parameters
divmain divider HCLK=HPCLK/div
pdiv1divider for pclk1= HCLK/ (2^PDIV1) default 1
pdiv2divider for pclk2= HCLK/ (2^PDIV2) default 5
Return values
None

◆ HAL_RCC_HCPU_SetDiv()

void HAL_RCC_HCPU_SetDiv ( int  div,
int  pdiv1,
int  pdiv2 
)

Set divider for clock of HCPU.

Parameters
divmain divider HCLK=HPCLK/div
pdiv1divider for pclk1= HCLK/ (2^PDIV1) default 1
pdiv2divider for pclk2= HCLK/ (2^PDIV2) default 5
Return values
None

◆ HAL_RCC_Init()

void HAL_RCC_Init ( void  )

RCC Init.

Disable some modules by default. If the function is called by HCPU, HPSYS_RCC is configured and HPSYS modules are disabled. If the function is called by LCPU, LPSYS_RCC is configured and LPSYS modules are disabled.

Returns
void

◆ HAL_RCC_LCPU_ClockSelect()

__STATIC_INLINE void HAL_RCC_LCPU_ClockSelect ( int  clk_module,
int  src 
)

Select clock source for LCPU HW module.

Parameters
clk_modulemodule for clock, RCC_CLK_MOD_XXX
srcclock 0:RCC_SYSCLK_HRC48, 1:RCC_SYSCLK_HXT48
Return values
None

◆ HAL_RCC_LCPU_GetClockSrc()

int HAL_RCC_LCPU_GetClockSrc ( int  clk_module)

Get clock source of LCPU HW module.

Parameters
clk_modulemodule for clock, RCC_CLK_MOD_XXX
Return values
clocksource,

◆ HAL_RCC_LCPU_GetDiv()

void HAL_RCC_LCPU_GetDiv ( int *  div,
int *  pdiv1,
int *  pdiv2 
)

Get divider for clock of LCPU.

Parameters
divpointer to hclk divider
pdiv1pointer to pclk1 divider
pdiv2pointer to pclk2 divider
Return values
None

◆ HAL_RCC_LCPU_SetDiv()

void HAL_RCC_LCPU_SetDiv ( int  div,
int  pdiv1,
int  pdiv2 
)

Set divider for clock of LCPU.

Parameters
divmain divider HCLK=LPCLK/div
pdiv1divider for pclk1= HCLK/ (2^PDIV1) default 1
pdiv2divider for pclk2= HCLK/ (2^PDIV2) default 3
Return values
None

◆ HAL_RCC_MspInit()

void HAL_RCC_MspInit ( void  )

Chip specific RCC initialization function.

It's called by HAL_RCC_Init. It's implemented as weak symbol internally, so can be re-implemented by user as required.

Returns
void

◆ HAL_RCC_ReleaseLCPU()

void HAL_RCC_ReleaseLCPU ( void  )

Release LCPU.

Return values
void

◆ HAL_RCC_Reset_and_Halt_LCPU()

void HAL_RCC_Reset_and_Halt_LCPU ( uint8_t  is_init)

Reset and halt LCPU.

Parameters
is_initIs in init state.
Return values
void

◆ HAL_RCC_ResetBluetoothRF()

void HAL_RCC_ResetBluetoothRF ( void  )

Reset BLE RF.

Return values
void

◆ HAL_RCC_ResetLCPU()

void HAL_RCC_ResetLCPU ( void  )

Reset LCPU.

Return values
void

◆ HAL_RCC_ResetModule()

void HAL_RCC_ResetModule ( RCC_MODULE_TYPE  module)

Reset module.

Parameters
modulemodule name
Return values
void

◆ HAL_RCC_SetMacFreq()

void HAL_RCC_SetMacFreq ( void  )

Set Mac freq.

Return values
void